x86: Remove split_msr_val()

It was better than a macro, but it was a little confusing when looking at
the code, since you'd have to know that 'high' was first.

Signed-off-by: Barret Rhoden <brho@cs.berkeley.edu>

kern/arch/x86/vmm/vmm.c

diff --git a/kern/arch/x86/vmm/vmm.c b/kern/arch/x86/vmm/vmm.c
index a7b4d95..8f0acc8 100644
--- a/kern/arch/x86/vmm/vmm.c
+++ b/kern/arch/x86/vmm/vmm.c
@@ -243,8 +243,6 @@
 
 static bool emsr_miscenable(struct emmsr *msr, struct vm_trapframe *vm_tf,
                             uint32_t opcode);
-static bool emsr_mustmatch(struct emmsr *msr, struct vm_trapframe *vm_tf,
-                           uint32_t opcode);
 static bool emsr_readonly(struct emmsr *msr, struct vm_trapframe *vm_tf,
                           uint32_t opcode);
 static bool emsr_readzero(struct emmsr *msr, struct vm_trapframe *vm_tf,
@@ -311,43 +309,14 @@
 bool emsr_miscenable(struct emmsr *msr, struct vm_trapframe *vm_tf,
                      uint32_t opcode)
 {
-	uint32_t eax, edx;
 	uint64_t val;
+	uint32_t eax, edx;
 
 	if (read_msr_safe(msr->reg, &val))
 		return FALSE;
-	split_msr_val(val, &edx, &eax);
-	/* we just let them read the misc msr for now. */
-	if (opcode == VMM_MSR_EMU_READ) {
-		vm_tf->tf_rax = eax;
-		vm_tf->tf_rax |= MSR_IA32_MISC_ENABLE_PEBS_UNAVAIL;
-		vm_tf->tf_rdx = edx;
-		return TRUE;
-	} else {
-		/* if they are writing what is already written, that's ok. */
-		eax |= MSR_IA32_MISC_ENABLE_PEBS_UNAVAIL;
-		if (((uint32_t) vm_tf->tf_rax == eax)
-		    && ((uint32_t) vm_tf->tf_rdx == edx))
-			return TRUE;
-	}
-	printk
-		("%s: Wanted to write 0x%x:0x%x, but could not; value was 0x%x:0x%x\n",
-		 msr->name, (uint32_t) vm_tf->tf_rdx, (uint32_t) vm_tf->tf_rax, edx,
-		 eax);
-	return FALSE;
-}
-
-/* TODO: this looks like a copy-paste for the read side.  What's the purpose of
- * mustmatch?  No one even uses it. */
-bool emsr_mustmatch(struct emmsr *msr, struct vm_trapframe *vm_tf,
-                    uint32_t opcode)
-{
-	uint32_t eax, edx;
-	uint64_t val;
-
-	if (read_msr_safe(msr->reg, &val))
-		return FALSE;
-	split_msr_val(val, &edx, &eax);
+	eax = low32(val);
+	eax |= MSR_IA32_MISC_ENABLE_PEBS_UNAVAIL;
+	edx = high32(val);
 	/* we just let them read the misc msr for now. */
 	if (opcode == VMM_MSR_EMU_READ) {
 		vm_tf->tf_rax = eax;
@@ -359,25 +328,22 @@
 		    && ((uint32_t) vm_tf->tf_rdx == edx))
 			return TRUE;
 	}
-	printk
-		("%s: Wanted to write 0x%x:0x%x, but could not; value was 0x%x:0x%x\n",
-		 msr->name, (uint32_t) vm_tf->tf_rdx, (uint32_t) vm_tf->tf_rax, edx,
-		 eax);
+	printk("%s: Wanted to write 0x%x%x, but could not; value was 0x%x%x\n",
+	       msr->name, (uint32_t) vm_tf->tf_rdx, (uint32_t) vm_tf->tf_rax,
+	       edx, eax);
 	return FALSE;
 }
 
 bool emsr_readonly(struct emmsr *msr, struct vm_trapframe *vm_tf,
                    uint32_t opcode)
 {
-	uint32_t eax, edx;
 	uint64_t val;
 
 	if (read_msr_safe(msr->reg, &val))
 		return FALSE;
-	split_msr_val(val, &edx, &eax);
 	if (opcode == VMM_MSR_EMU_READ) {
-		vm_tf->tf_rax = eax;
-		vm_tf->tf_rdx = edx;
+		vm_tf->tf_rax = low32(val);
+		vm_tf->tf_rdx = high32(val);
 		return TRUE;
 	}
 
@@ -408,10 +374,11 @@
 	if (!msr->written) {
 		if (read_msr_safe(msr->reg, &val))
 			return FALSE;
-		split_msr_val(val, &edx, &eax);
+		eax = low32(val);
+		edx = high32(val);
 	} else {
-		edx = msr->edx;
 		eax = msr->eax;
+		edx = msr->edx;
 	}
 	/* we just let them read the misc msr for now. */
 	if (opcode == VMM_MSR_EMU_READ) {
@@ -419,10 +386,6 @@
 		vm_tf->tf_rdx = edx;
 		return TRUE;
 	} else {
-		/* if they are writing what is already written, that's ok. */
-		if (((uint32_t) vm_tf->tf_rax == eax)
-		    && ((uint32_t) vm_tf->tf_rdx == edx))
-			return TRUE;
 		msr->edx = vm_tf->tf_rdx;
 		msr->eax = vm_tf->tf_rax;
 		msr->written = TRUE;
@@ -433,15 +396,13 @@
 bool emsr_ok(struct emmsr *msr, struct vm_trapframe *vm_tf,
              uint32_t opcode)
 {
-	uint32_t eax, edx;
 	uint64_t val;
 
 	if (opcode == VMM_MSR_EMU_READ) {
 		if (read_msr_safe(msr->reg, &val))
 			return FALSE;
-		split_msr_val(val, &edx, &eax);
-		vm_tf->tf_rax = eax;
-		vm_tf->tf_rdx = edx;
+		vm_tf->tf_rax = low32(val);
+		vm_tf->tf_rdx = high32(val);
 	} else {
 		val = (vm_tf->tf_rdx << 32) | (vm_tf->tf_rax & 0xffffffff);
 		if (write_msr_safe(msr->reg, val))

kern/arch/x86/x86.h

diff --git a/kern/arch/x86/x86.h b/kern/arch/x86/x86.h
index 760e430..ed48159 100644
--- a/kern/arch/x86/x86.h
+++ b/kern/arch/x86/x86.h
@@ -470,12 +470,6 @@
 	return (uint64_t)edx << 32 | eax;
 }
 
-static void split_msr_val(uint64_t val, uint32_t *high32, uint32_t *low32)
-{
-	*high32 = val >> 32;
-	*low32 = val & 0xffffffff;
-}
-
 static inline void write_msr(uint32_t reg, uint64_t val)
 {
 	asm volatile("wrmsr" : : "d"(val >> 32), "a"(val & 0xFFFFFFFF), "c"(reg));

kern/include/common.h

diff --git a/kern/include/common.h b/kern/include/common.h
index 859fd35..cf467a4 100644
--- a/kern/include/common.h
+++ b/kern/include/common.h
@@ -64,3 +64,17 @@
 		ran_once = TRUE;                                                       \
 	}                                                                          \
 } while (0)
+
+#ifndef __ASSEMBLER__
+
+static inline uint32_t low32(uint64_t val)
+{
+	return val & 0xffffffff;
+}
+
+static inline uint32_t high32(uint64_t val)
+{
+	return val >> 32;
+}
+
+#endif /* !__ASSEMBLER__ */