)]}'
{
  "commit": "a4989aa87fda0432514692e30cffebba660ce546",
  "tree": "99f4debab0f1916b1d7c0f40f0edba50d3151de6",
  "parents": [
    "39fcde41f1bc655fac366738a2480213c3bcef35"
  ],
  "author": {
    "name": "Barret Rhoden",
    "email": "brho@cs.berkeley.edu",
    "time": "Wed Aug 14 11:30:15 2019 -0400"
  },
  "committer": {
    "name": "Barret Rhoden",
    "email": "brho@cs.berkeley.edu",
    "time": "Wed Aug 14 11:36:10 2019 -0400"
  },
  "message": "pci: add support for MMIO config space\n\nMMIO config space has two benefits: it does not require the global PCI\nlock, and it easily works with extended PCI config space (i.e. above 255).\n\nFor whatever reason, I had an old note that said you could use PIO for\nthe extended config space.  I probably got that from looking at Linux or\nsomething.  It might have worked on some older machines for me; I don\u0027t\nrecall.  But it certainly does not work with all machines.  Maybe it was\nan AMD/Intel thing.\n\nI left support for PIO in case we run into a weird machine that doesn\u0027t\nhave the ACPI MCFG table or for debugging.  Though even my QEMU has an\nMCFG.  We can remove it if it is a pain - maybe when we make PCI more\narchitecture-independent.  Right now it is x86-specific, both in PIO and\nMMIO ops.\n\nSigned-off-by: Barret Rhoden \u003cbrho@cs.berkeley.edu\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "334def497115913ed905fd7a7c5bcfb1bbf4e887",
      "old_mode": 33188,
      "old_path": "kern/arch/x86/pci.c",
      "new_id": "ed90424f4207a1b117853f963c8cd2b5b53b286e",
      "new_mode": 33188,
      "new_path": "kern/arch/x86/pci.c"
    },
    {
      "type": "modify",
      "old_id": "89c355aea119a8a3885dd59292a865e4bcdcc6ed",
      "old_mode": 33188,
      "old_path": "kern/arch/x86/pci.h",
      "new_id": "55bfb93cd2f66f4124f06906123e64c32b91bbd1",
      "new_mode": 33188,
      "new_path": "kern/arch/x86/pci.h"
    }
  ]
}