WIP-amd various hacks needed for AMD. need to redo this commit, etc. Signed-off-by: Barret Rhoden <brho@cs.berkeley.edu>
diff --git a/kern/arch/x86/apic.h b/kern/arch/x86/apic.h index 5752b89..8d0b959 100644 --- a/kern/arch/x86/apic.h +++ b/kern/arch/x86/apic.h
@@ -225,7 +225,7 @@ enum { Nbus = 256, - Napic = 254, /* xAPIC architectural limit */ + Napic = 256, // XXX /* xAPIC architectural limit */ Nrdt = 64, };
diff --git a/kern/arch/x86/entry64.S b/kern/arch/x86/entry64.S index 9740273..c8378d8 100644 --- a/kern/arch/x86/entry64.S +++ b/kern/arch/x86/entry64.S
@@ -265,7 +265,7 @@ insert_pml3: shrl $7, %esi # want to shift vaddr >> 39 andl $0x1ff, %esi - orl $(PTE_P | PTE_W | PTE_G), %edi + orl $(PTE_P | PTE_W), %edi movl %edi, (%ecx, %esi, 8) movl $0x0, 4(%ecx, %esi, 8) # being clever, i know upper bits are 0 ret @@ -280,7 +280,7 @@ shrl $30, %edx orl %edx, %esi andl $0x1ff, %esi - orl $(PTE_P | PTE_W | PTE_G), %edi + orl $(PTE_P | PTE_W), %edi movl %edi, (%ecx, %esi, 8) movl $0x0, 4(%ecx, %esi, 8) # being clever, i know upper bits are 0 ret
diff --git a/kern/arch/x86/ioapic.c b/kern/arch/x86/ioapic.c index 3e0e481..b4bfb09 100644 --- a/kern/arch/x86/ioapic.c +++ b/kern/arch/x86/ioapic.c
@@ -271,6 +271,13 @@ struct apic *apic; static int base; + // XXX machines with multiple IOAPICs can have one outside the default + // area... goddamn + if (!((IOAPIC_PBASE <= pa) && + (pa + PGSIZE <= IOAPIC_PBASE + APIC_SIZE))) { + printk("Got an IOAPIC at %p, ignoring...\n", pa); + return; + } assert((IOAPIC_PBASE <= pa) && (pa + PGSIZE <= IOAPIC_PBASE + APIC_SIZE)); /*
diff --git a/kern/arch/x86/ros/arch.h b/kern/arch/x86/ros/arch.h index a09129b..046f24c 100644 --- a/kern/arch/x86/ros/arch.h +++ b/kern/arch/x86/ros/arch.h
@@ -1,3 +1,3 @@ #pragma once -#define MAX_NUM_CORES 255 +#define MAX_NUM_CORES 256
diff --git a/kern/arch/x86/smp_boot.c b/kern/arch/x86/smp_boot.c index 0f1bb4b..bad72c5 100644 --- a/kern/arch/x86/smp_boot.c +++ b/kern/arch/x86/smp_boot.c
@@ -203,6 +203,12 @@ num_cores, x86_num_cores_booted, x86_num_cores_booted); num_cores = x86_num_cores_booted; } + + if (num_cores > 255) { + warn("XXX %d cores booted, limiting to 254\n", num_cores); + num_cores = 254; + } + // Dealloc the temp shared stack page_decref(smp_stack);
diff --git a/kern/arch/x86/x86.h b/kern/arch/x86/x86.h index 1a7040a..5075a39 100644 --- a/kern/arch/x86/x86.h +++ b/kern/arch/x86/x86.h
@@ -54,9 +54,6 @@ /* CPUID */ #define CPUID_PSE_SUPPORT 0x00000008 -/* Arch Constants */ -#define MAX_NUM_CORES 255 - #define X86_REG_BP "rbp" #define X86_REG_SP "rsp" #define X86_REG_IP "rip"
diff --git a/kern/src/pmap.c b/kern/src/pmap.c index ebdc1e8..b8305e1 100644 --- a/kern/src/pmap.c +++ b/kern/src/pmap.c
@@ -105,8 +105,21 @@ if (entry->type != MULTIBOOT_MEMORY_AVAILABLE) return; - if (!*boot_zone || (sizeof_mboot_mmentry(entry) > - sizeof_mboot_mmentry(*boot_zone))) + + if (!*boot_zone) + *boot_zone = entry; + + // XXX we need the bootzone to be in the temporary mapping set from + // assembly. i.e < 512 GB for KERNBASE. usually is this one... + #define MAGIC_REGION 0x100000000 + if ((*boot_zone)->addr == MAGIC_REGION) + return; + if (entry->addr == MAGIC_REGION) { + *boot_zone = entry; + return; + } + + if ((sizeof_mboot_mmentry(entry) > sizeof_mboot_mmentry(*boot_zone))) *boot_zone = entry; }